Digitizer Tester: Difference between revisions

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* The board completely loses its mind (FPGA goes blank) if the power is cycled.  This is a known issue with this particular PC board.  If the power has been cycled you must use the old beater laptop to re-load the main FPGA with the operating image while the board is powered.  Contact John Anderson or Mike Oberling for the password and sequence of steps.  The FPGA image file dig_tester.bit is on the desktop of that laptop.
* The board completely loses its mind (FPGA goes blank) if the power is cycled.  This is a known issue with this particular PC board.  If the power has been cycled you must use the old beater laptop to re-load the main FPGA with the operating image while the board is powered.  Contact John Anderson or Mike Oberling for the password and sequence of steps.  The FPGA image file dig_tester.bit is on the desktop of that laptop.
* You can visually determine if the Digitizer Tester has a valid program by looking at the LEDs.  If the Tester has a valid program the yellow LEDs at bottom right will be illuminated; if it's "lost its mind" they will be dark.


* The normal boot script of IOC 10 does not allocate VME access to the Digitizer Tester.  In order to make the module accessible to the engineering PC, you must enter the command
* The normal boot script of IOC 10 does not allocate VME access to the Digitizer Tester.  In order to make the module accessible to the engineering PC, you must enter the command

Latest revision as of 22:22, February 11, 2013

The Digitizer Tester

A Digitizer Tester is a module designed to generate detector-like signals, acting as an arbitrary waveform generator with differential outputs. It is normally used in the test stand but can be use in the experiment as a "fake source". There is no page for the Digitizer Tester in the experiment GUI, you have to use the GammaWareR2 program on the engineering PC in the data room.

As of 20130210, a Digitizer Tester board is installed in crate 10 of the DFMA system. The board has two special characteristics you must be aware of:

  • The board completely loses its mind (FPGA goes blank) if the power is cycled. This is a known issue with this particular PC board. If the power has been cycled you must use the old beater laptop to re-load the main FPGA with the operating image while the board is powered. Contact John Anderson or Mike Oberling for the password and sequence of steps. The FPGA image file dig_tester.bit is on the desktop of that laptop.
  • You can visually determine if the Digitizer Tester has a valid program by looking at the LEDs. If the Tester has a valid program the yellow LEDs at bottom right will be illuminated; if it's "lost its mind" they will be dark.
  • The normal boot script of IOC 10 does not allocate VME access to the Digitizer Tester. In order to make the module accessible to the engineering PC, you must enter the command

asynDebugCard(4,7)

at the IOC terminal command prompt. After this command has been issued the PC will then be able to use the Tester.


---JTA, 20130210