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Combined display of all available logs of GammaSphere DAQ. You can narrow down the view by selecting a log type, the username (case-sensitive), or the affected page (also case-sensitive).
- 15:51, September 20, 2021 Jta talk contribs created page File:Dig pic 39.png (cfd discriminator pre-arming)
- 15:51, September 20, 2021 Jta talk contribs uploaded File:Dig pic 39.png (cfd discriminator pre-arming)
- 15:50, September 20, 2021 Jta talk contribs created page File:Dig pic 38.png (led mode waveform overlay)
- 15:50, September 20, 2021 Jta talk contribs uploaded File:Dig pic 38.png (led mode waveform overlay)
- 15:49, September 20, 2021 Jta talk contribs created page File:Dig pic 37.png (header formation and pehq)
- 15:49, September 20, 2021 Jta talk contribs uploaded File:Dig pic 37.png (header formation and pehq)
- 15:49, September 20, 2021 Jta talk contribs created page File:Dig pic 36.png (other timing delays)
- 15:49, September 20, 2021 Jta talk contribs uploaded File:Dig pic 36.png (other timing delays)
- 15:48, September 20, 2021 Jta talk contribs created page File:Dig pic 35.png (pileup timing in CFD mode)
- 15:48, September 20, 2021 Jta talk contribs uploaded File:Dig pic 35.png (pileup timing in CFD mode)
- 15:47, September 20, 2021 Jta talk contribs created page File:Dic pic 34.png (timing mark formation, LED mode)
- 15:47, September 20, 2021 Jta talk contribs uploaded File:Dic pic 34.png (timing mark formation, LED mode)
- 15:46, September 20, 2021 Jta talk contribs created page File:Dig pic 33.png (pileup timing)
- 15:46, September 20, 2021 Jta talk contribs uploaded File:Dig pic 33.png (pileup timing)
- 15:45, September 20, 2021 Jta talk contribs created page File:Dig pic 32.png (Timing of CHAIN_INVALID and sequenced initialization thereafter)
- 15:45, September 20, 2021 Jta talk contribs uploaded File:Dig pic 32.png (Timing of CHAIN_INVALID and sequenced initialization thereafter)
- 15:44, September 20, 2021 Jta talk contribs created page File:Dig pic 31.png (Delay buffers per channel have differing widths for implementation of delays without counters)
- 15:44, September 20, 2021 Jta talk contribs uploaded File:Dig pic 31.png (Delay buffers per channel have differing widths for implementation of delays without counters)
- 17:31, September 17, 2021 Copp talk contribs created page Updating Firmware in Digitizers and Triggers (Created page with "==Some more notes about flashing digitizers or triggers:== # Log into dgs account on dgs1 # Get the *.bin from directory /Digitizer/MAIN_FPGA/Work11_DGS ## We have 4 flavors,...")
- 21:14, September 16, 2021 Copp talk contribs created page File:Trigger Header Format.jpg
- 21:14, September 16, 2021 Copp talk contribs uploaded File:Trigger Header Format.jpg
- 21:12, September 16, 2021 Copp talk contribs created page File:InLoop Header.jpg
- 21:12, September 16, 2021 Copp talk contribs uploaded File:InLoop Header.jpg
- 20:49, September 16, 2021 Copp talk contribs created page File:Trigger Throttle.jpg
- 20:49, September 16, 2021 Copp talk contribs uploaded File:Trigger Throttle.jpg
- 20:35, September 16, 2021 Copp talk contribs created page File:Digitizer FIFO and Throttle.jpg
- 20:35, September 16, 2021 Copp talk contribs uploaded File:Digitizer FIFO and Throttle.jpg
- 20:26, September 16, 2021 Copp talk contribs created page IOC Code Design (Created page with "== Intro == When an IOC (Input/Output Controller) has a pile of buffers from a digitizer or trigger module, each is pointed to by a '''pointer''' in one of three VxWorks queue...")
- 20:25, September 16, 2021 Copp talk contribs created page File:IOC State Diagram for inLoop.jpg
- 20:25, September 16, 2021 Copp talk contribs uploaded File:IOC State Diagram for inLoop.jpg
- 18:37, September 16, 2021 User account Copp talk contribs was created automatically
- 14:55, September 15, 2021 Mcarpenter talk contribs created page Updating Firmware in Modules (Created page with "Some more notes about flashing digitizers or triggers: # Log into dgs account on dgs1 Get digitizer.bin from svn and copy it to directory /Digitizer/MAIN_FPGA/Work11_DGS")
- 20:03, July 31, 2020 EYE talk contribs uploaded File:Python Materials.zip
- 16:41, July 8, 2020 EYE talk contribs deleted page File:Generation of C and VHDL from spreadsheet.docx (Deleted old revision 20200708164059!Generation_of_C_and_VHDL_from_spreadsheet.docx: Duplicated file)
- 16:40, July 8, 2020 EYE talk contribs uploaded a new version of File:Generation of C and VHDL from spreadsheet.docx
- 16:40, July 8, 2020 User account EYE talk contribs was created automatically
- 16:39, July 8, 2020 Eye talk contribs uploaded File:Generation of C and VHDL from spreadsheet.docx
- 01:56, July 3, 2020 Jta talk contribs uploaded File:Screenshot-18.png (pdu control screen 2)
- 01:56, July 3, 2020 Jta talk contribs uploaded File:Screenshot-17.png (PDU #1 screen shot)
- 14:21, June 26, 2020 Eye talk contribs uploaded File:Screensmap.JPG
- 01:59, June 20, 2020 User account Eye talk contribs was created automatically
- 19:29, May 28, 2020 Jta talk contribs uploaded File:Header colorkey.png (color keying for digitizer/trigger data format pictures.)
- 21:21, September 11, 2019 Jta talk contribs uploaded File:MyriadTrigAlgorithm.PNG
- 21:08, September 11, 2019 Jta talk contribs uploaded File:RemoteTrigAlgorithm.PNG
- 20:47, September 11, 2019 Jta talk contribs uploaded File:RemoteTriggerQueuing.png
- 20:18, September 11, 2019 Jta talk contribs uploaded File:Ttcl cutout.PNG (part of the manual no one has ever read.)
- 17:05, September 11, 2019 Jta talk contribs uploaded File:FullSystem.png (full system picture.)
- 16:57, September 11, 2019 Jta talk contribs uploaded a new version of File:ClockHierarchy.png (updated with a couple typos fixed.)
- 16:51, September 11, 2019 Jta talk contribs uploaded File:ClockHierarchy.png (Sketch of basic clock hierarchy in digital DAQ.)
- 20:24, April 20, 2019 Jta talk contribs uploaded File:DigitizerIOC.PNG
